Control Registers
[Intel IA32 (32-bit) Architecture]

Collaboration diagram for Control Registers:

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Detailed Description

The ia32 CPU architecture includes 5 "control registers" as follows.

CR0 contains system control flags that control operating mode and states of the processor. The CR0 flags include the following.

• PG (bit 31) Paging. Enables paging when set. Has no effect if the PE flags is not also set.

• CD (bit 30) Cache disable. If CD and NW are clear, caching is enabled.

• NW (bit 29) Not Write-through. When clear, write-back through the cache is enabled.

• AM (bit 18) Alignment Mask. Enables automatic alignment checking.

• WP (bit 16) Write Protect. Inhibits supervisor-level code from writing into user-level read-only pages when set.

• NE (bit 5) Numeric Error. Enables internal vs. 8086 emulation for reporting FPU errors.

• ET (bit 4) Extension type. Not used in Pentium or later CPUs.

• TS (bit 3) Task Switched. Set by a task switch, causes an #NM exception to be raised when certain instructions are executed.

• EM (bit 2) EMulation. Indicates emulations of several extensions to the 80386.

• MP (bit 1) Monitor Coprocessor. Affects the operation of the TS flag.

• PE (bit 0) Protection Enable. Enabled "protected mode" when set.

CR1 is reserved.

CR2 contains the page fault liner address (the linear address that caused a page fault).

CR3 contains the physical address of the base of the page directory and two flags, PCD and PWT, which control caching of the page directory in the processor's internal data caches.

• PCD (bit 4) Page-level Cache Disable.

• PWT (bit 3) Page-level Writes Transparent.

CR4 contains a group of flags that enable certain architectural extensions. The CR4 flags include the following.

• VME (bit 0) Virtual-8086 Mode Extensions.

• PVI (bit 1) Protected-mode Virtual Interrupts.

• TSD (bit 2) Time Stamp Disable.

Functions
static u32	Zygoma::getCR2 ()
	Gets the contents of Control Register 2.
static void	Zygoma::setCR3 (u32 pagedir)
	Sets the contents of Control Register 3.
static u32	Zygoma::getCR3 ()
	Gets the contents of Control Register 3.

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Function Documentation

static u32 Zygoma::getCR2 (   )  [inline, static]

Gets the contents of Control Register 2. CR2 holds the location of the last page fault.

static u32 Zygoma::getCR3 (   )  [inline, static]

Gets the contents of Control Register 3. CR3 holds the base address of a Page Directory. It is also known as the Page Directory Base Register (PDBR).

static void Zygoma::setCR3 (  u32  pagedir  )  [inline, static]

Sets the contents of Control Register 3. CR3 holds the base address of a Page Directory. It is also known as the Page Directory Base Register (PDBR).

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